1. Field of the Disclosure
The present disclosure relates to electronic devices, more particularly, to electronic devices including semiconductor fins overlying an insulating layer.
2. Description of the Related Art
A dual gate oxide (“DGO”) transistor can have a relatively longer channel length than another device designed to operate a lower voltage. A planar DGO transistor is conventional, but can cover a larger area from a top view and have relatively lower performance than a corresponding device including one or more fin structures. However, fin structures can be fragile, and therefore, are more difficult to manufacture than the corresponding planar device. One approach can be to make individual fin structures wider and correspondingly more physically robust. This approach can reduce the area and performance advantages of using a transistor including one or more fin structures.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention. The use of the same reference symbols in different drawings indicates similar or identical items.